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Nicolas CastelNC

Nicolas Castel

Design & Verif FPGA/ASIC | VHDL & VERILOG

€550/day
Aix-en-Provence, FR
3-7 years
FPGA
ASIC
VHDL
Verilog
Traitement du signal

Average response time: 1 hour

About Nicolas

Diplômé du master systèmes électroniques et systèmes informatiques de Sorbonne université.

Je suis ingénieur en design digital avec 6 ans d'expérience spécialisé en design rtl, vérification et synthèse pour ASIC et FPGA.
Defense and Military
Banking and Financial Services
Plant and Machinery

  • French

    Native or bilingual

  • English

    Fluent

Can work on-site
Aix-en-Provence (up to 50km), Nice (up to 50km)

Experience

  • Theryq (Next generation Radiotherapy Flash),
    FPGA RTL design engineer | October 2024 to April 2026 (1.5years)
    MEDICAL
    October 2024 - April 2026 (1 year and 6 months)
    Peynier, France
    -Design and verification of high-precision real-time RTL architectures for a medicaldevice, achieving timing closure on resource-constrained Microchip FPGA platforms
    FPGA VHDL Traitement du signal Temps réel Tests de non regression
  • Idemia Secure Transaction,
    ASIC RTL design engineer | September 2023 to August 2024 (1year)
    BANKING AND INSURANCE
    September 2023 - August 2024 (11 months)
    Meyreuil, France
    -Select and integrate a RISC-V CPU to replace the licensed CPU used in Idemia's designs. RTL verification of several Verilog architectures for secure products.
    Verilog RISC-V Cadence ASIC Tests de non regression
  • Faurecia Clarion Electronics,
    ASIC RTL design engineer | June 2020 to June 2023 (3years)
    AUTOMOBILE
    June 2020 - June 2023 (3 years)
    Paris, France
    - ASIC development for radio and tv reception in cars. Development of the audio IPs and an architecture including an opencore CPU.
    ASIC Cadence VHDL Synthèse sta Tests de non regression
Check out Nicolas's experience

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Education

  • Master en micro électronique
    Sorbonne Université
    2019
    Development fpga Traitement du signal Électronique analogique Programmation bas niveau
  • License électronique
    Université Pierre et Marie Curie
    2017
Check out Nicolas's education

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